From 70b77304f37d9681aa3bfa0eb57df0bcfd1aef81 Mon Sep 17 00:00:00 2001
From: Michael Abed <michaelabed@gmail.com>
Date: Fri, 17 Feb 2012 12:08:05 -0500
Subject: make it work

---
 ALU.twx | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'ALU.twx')

diff --git a/ALU.twx b/ALU.twx
index b395950..b90cdc4 100755
--- a/ALU.twx
+++ b/ALU.twx
@@ -332,7 +332,7 @@
 <twReport><twHead anchorID="1"><twExecVer>Release 13.3 Trace  (nt64)</twExecVer><twCopyright>Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 3
 -n 3 -fastpaths -xml ALU.twx ALU.ncd -o ALU.twr ALU.pcf -ucf ALU.ucf
 
-</twCmdLine><twDesign>ALU.ncd</twDesign><twDesignPath>ALU.ncd</twDesignPath><twPCF>ALU.pcf</twPCF><twPcfPath>ALU.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-3</twSpeedGrade><twSpeedVer>PRODUCTION 1.20 2011-10-03</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="5" twNameLen="15"><twPad2PadList anchorID="6" twSrcWidth="2" twDestWidth="5"><twPad2Pad><twSrc>A</twSrc><twDest>a_out</twDest><twDel>11.660</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>b_out</twDest><twDel>11.371</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>c_out</twDest><twDel>11.727</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>d_out</twDest><twDel>11.840</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>e_out</twDest><twDel>11.906</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>f_out</twDest><twDel>11.587</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>g_out</twDest><twDel>11.574</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>sign</twDest><twDel>11.406</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>a_out</twDest><twDel>11.326</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>b_out</twDest><twDel>10.895</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>c_out</twDest><twDel>11.387</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>d_out</twDest><twDel>11.931</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>e_out</twDest><twDel>11.927</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>f_out</twDest><twDel>11.342</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>g_out</twDest><twDel>11.489</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>sign</twDest><twDel>11.072</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>a_out</twDest><twDel>11.426</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>b_out</twDest><twDel>11.174</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>c_out</twDest><twDel>11.560</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>d_out</twDest><twDel>11.886</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>e_out</twDest><twDel>11.818</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>f_out</twDest><twDel>11.515</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>g_out</twDest><twDel>11.620</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>sign</twDest><twDel>10.949</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>a_out</twDest><twDel>11.570</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>b_out</twDest><twDel>11.214</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>c_out</twDest><twDel>11.759</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>d_out</twDest><twDel>12.390</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>e_out</twDest><twDel>12.386</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>f_out</twDest><twDel>11.767</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>g_out</twDest><twDel>11.948</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>sign</twDest><twDel>11.316</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>a_out</twDest><twDel>11.110</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>b_out</twDest><twDel>10.858</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>c_out</twDest><twDel>11.214</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>d_out</twDest><twDel>11.410</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>e_out</twDest><twDel>11.406</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>f_out</twDest><twDel>11.074</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>g_out</twDest><twDel>11.014</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>sign</twDest><twDel>10.662</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>a_out</twDest><twDel>10.677</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>b_out</twDest><twDel>10.260</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>c_out</twDest><twDel>10.664</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>d_out</twDest><twDel>11.023</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>e_out</twDest><twDel>11.019</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>f_out</twDest><twDel>10.545</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>g_out</twDest><twDel>10.581</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>sign</twDest><twDel>10.423</twDel></twPad2Pad></twPad2PadList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Wed Feb 15 15:16:31 2012 </twTimestamp></twFoot><twClientInfo anchorID="7"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
+</twCmdLine><twDesign>ALU.ncd</twDesign><twDesignPath>ALU.ncd</twDesignPath><twPCF>ALU.pcf</twPCF><twPcfPath>ALU.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-3</twSpeedGrade><twSpeedVer>PRODUCTION 1.20 2011-10-03</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="5" twNameLen="15"><twPad2PadList anchorID="6" twSrcWidth="2" twDestWidth="5"><twPad2Pad><twSrc>A</twSrc><twDest>a_out</twDest><twDel>12.121</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>b_out</twDest><twDel>12.114</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>c_out</twDest><twDel>12.193</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>d_out</twDest><twDel>12.977</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>e_out</twDest><twDel>12.603</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>f_out</twDest><twDel>12.193</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>g_out</twDest><twDel>12.222</twDel></twPad2Pad><twPad2Pad><twSrc>A</twSrc><twDest>sign</twDest><twDel>11.976</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>a_out</twDest><twDel>11.205</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>b_out</twDest><twDel>11.242</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>c_out</twDest><twDel>11.297</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>d_out</twDest><twDel>11.960</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>e_out</twDest><twDel>11.586</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>f_out</twDest><twDel>11.229</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>g_out</twDest><twDel>11.350</twDel></twPad2Pad><twPad2Pad><twSrc>B</twSrc><twDest>sign</twDest><twDel>11.012</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>a_out</twDest><twDel>11.203</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>b_out</twDest><twDel>10.960</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>c_out</twDest><twDel>11.269</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>d_out</twDest><twDel>12.059</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>e_out</twDest><twDel>11.685</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>f_out</twDest><twDel>10.983</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>g_out</twDest><twDel>11.068</twDel></twPad2Pad><twPad2Pad><twSrc>C</twSrc><twDest>sign</twDest><twDel>10.766</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>a_out</twDest><twDel>11.544</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>b_out</twDest><twDel>11.218</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>c_out</twDest><twDel>11.615</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>d_out</twDest><twDel>12.400</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>e_out</twDest><twDel>12.026</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>f_out</twDest><twDel>11.410</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>g_out</twDest><twDel>11.394</twDel></twPad2Pad><twPad2Pad><twSrc>D</twSrc><twDest>sign</twDest><twDel>11.193</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>a_out</twDest><twDel>10.816</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>b_out</twDest><twDel>10.961</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>c_out</twDest><twDel>10.908</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>d_out</twDest><twDel>11.499</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>e_out</twDest><twDel>11.125</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>f_out</twDest><twDel>10.838</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>g_out</twDest><twDel>11.069</twDel></twPad2Pad><twPad2Pad><twSrc>S0</twSrc><twDest>sign</twDest><twDel>10.498</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>a_out</twDest><twDel>10.737</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>b_out</twDest><twDel>10.588</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>c_out</twDest><twDel>10.829</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>d_out</twDest><twDel>11.247</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>e_out</twDest><twDel>10.873</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>f_out</twDest><twDel>10.465</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>g_out</twDest><twDel>10.696</twDel></twPad2Pad><twPad2Pad><twSrc>S1</twSrc><twDest>sign</twDest><twDel>10.233</twDel></twPad2Pad></twPad2PadList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Thu Feb 16 19:53:32 2012 </twTimestamp></twFoot><twClientInfo anchorID="7"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
 
-Peak Memory Usage: 217 MB
+Peak Memory Usage: 230 MB
 </twValue></twAttrListItem></twAttrList></twClientInfo></twReport>
-- 
cgit v1.2.3