From 59d89428d6160fb672c2b6a41339505cc69344d0 Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Fri, 17 Feb 2012 12:10:31 -0500 Subject: finish it --- ALUSHOW_envsettings.html | 234 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 192 insertions(+), 42 deletions(-) (limited to 'ALUSHOW_envsettings.html') diff --git a/ALUSHOW_envsettings.html b/ALUSHOW_envsettings.html index 2c8f42b..1613018 100644 --- a/ALUSHOW_envsettings.html +++ b/ALUSHOW_envsettings.html @@ -14,53 +14,53 @@ par -PATH -C:
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\Xilinx\13.3\ISE_DS\common\lib\nt64;C:
\Windows\system32;C:
\Windows;C:
\Windows\System32\Wbem;C:
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C:\Cadence\SPB_16.5\tools\pcb\bin +C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;
C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;
C:\Xilinx\13.3\ISE_DS\PlanAhead\bin;
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\Xilinx\13.3\ISE_DS\ISE\ -< data not available > -< data not available > -< data not available > +C:\Xilinx\13.3\ISE_DS\ISE\ +C:\Xilinx\13.3\ISE_DS\ISE\ +C:\Xilinx\13.3\ISE_DS\ISE\ +C:\Xilinx\13.3\ISE_DS\ISE\ XILINXD_LICENSE_FILE 2100@XilinxLM.bu.edu -< data not available > -< data not available > -< data not available > +2100@XilinxLM.bu.edu +2100@XilinxLM.bu.edu +2100@XilinxLM.bu.edu XILINX_DSP -C:
\Xilinx\13.3\ISE_DS\ISE -< data not available > -< data not available > -< data not available > +C:\Xilinx\13.3\ISE_DS\ISE +C:\Xilinx\13.3\ISE_DS\ISE +C:\Xilinx\13.3\ISE_DS\ISE +C:\Xilinx\13.3\ISE_DS\ISE XILINX_EDK -C:
\Xilinx\13.3\ISE_DS\EDK -< data not available > -< data not available > -< data not available > +C:\Xilinx\13.3\ISE_DS\EDK +C:\Xilinx\13.3\ISE_DS\EDK +C:\Xilinx\13.3\ISE_DS\EDK +C:\Xilinx\13.3\ISE_DS\EDK XILINX_PLANAHEAD -C:
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Translation Property Settings
Switch NameProperty NameValueDefault Value
-intstyle iseNone
-dd _ngoNone
-p xc6slx16-csg324-3None
-uc ALUSHOW.ucfNone
+ + 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Map Property Settings
Switch NameProperty NameValueDefault Value
-olPlace & Route Effort Level (Overall)highhigh
-xtExtra Cost Tables00
-irUse RLOC ConstraintsOFFOFF
-tStarting Placer Cost Table (1-100) Map10
-rRegister Ordering44
-intstyle iseNone
-lcLUT Combiningoffoff
-o ALUSHOW_map.ncdNone
-w truefalse
-prPack I/O Registers/Latches into IOBsoffoff
-p xc6slx16-csg324-3None
+ + 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Place and Route Property Settings
Switch NameProperty NameValueDefault Value
-intstyle ise 
-mtEnable Multi-Threadingoffoff
-olPlace & Route Effort Level (Overall)highstd
-w truefalse
 
@@ -366,30 +516,30 @@ - - - + + + - - - - + + + + - - - + + + - - - + + +
CPU Architecture/Speed Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz<  data not available  ><  data not available  ><  data not available  >Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHzIntel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHzIntel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz
HostECE-PHO115-09<  data not available  ><  data not available  ><  data not available  >ECE-PHO115-08ECE-PHO115-08ECE-PHO115-08ECE-PHO115-08
OS Name Microsoft Windows 7 , 64-bit<  data not available  ><  data not available  ><  data not available  >Microsoft Windows 7 , 64-bitMicrosoft Windows 7 , 64-bitMicrosoft Windows 7 , 64-bit
OS Release Service Pack 1 (build 7601)<  data not available  ><  data not available  ><  data not available  >Service Pack 1 (build 7601)Service Pack 1 (build 7601)Service Pack 1 (build 7601)
\ No newline at end of file -- cgit v1.2.3-54-g00ecf