From 0bdf2f0b18f7e2986336f8afc67fe18b8b382e7a Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Thu, 16 Feb 2012 15:46:55 -0500 Subject: initial commit --- ALU_summary.html | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100755 ALU_summary.html (limited to 'ALU_summary.html') diff --git a/ALU_summary.html b/ALU_summary.html new file mode 100755 index 0000000..4ca0738 --- /dev/null +++ b/ALU_summary.html @@ -0,0 +1,79 @@ +Xilinx Design Summary + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ALU Project Status
Project File:lab2.xiseParser Errors: No Errors
Module Name:ALUImplementation State:New (Failed)
Target Device:xc6slx16-3csg324
  • Errors:
 
Product Version:ISE 13.3
  • Warnings:
 
Design Goal:Balanced
  • Routing Results:
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Design Strategy:Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: 
  • Final Timing Score:
  
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Detailed Reports [-]
Report NameStatusGeneratedErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
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Secondary Reports [-]
Report NameStatusGenerated
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Date Generated: 02/15/2012 - 16:06:19
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