From 59d89428d6160fb672c2b6a41339505cc69344d0 Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Fri, 17 Feb 2012 12:10:31 -0500 Subject: finish it --- pa.fromHdl.tcl | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) (limited to 'pa.fromHdl.tcl') diff --git a/pa.fromHdl.tcl b/pa.fromHdl.tcl index 2112f38..73123ec 100755 --- a/pa.fromHdl.tcl +++ b/pa.fromHdl.tcl @@ -1,19 +1,19 @@ - -# PlanAhead Launch Script for Pre-Synthesis Floorplanning, created by Project Navigator - -create_project -name lab2 -dir "/home/michael/Documents/School/EC311/lab2/planAhead_run_2" -part xc6slx16csg324-3 -set_param project.pinAheadLayout yes -set srcset [get_property srcset [current_run -impl]] -set_property target_constrs_file "ALUSHOW.ucf" [current_fileset -constrset] -set hdlfile [add_files [list {sev_seg_disp.vf}]] -set_property file_type Verilog $hdlfile -set_property library work $hdlfile -set hdlfile [add_files [list {ALU.v}]] -set_property file_type Verilog $hdlfile -set_property library work $hdlfile -set hdlfile [add_files [list {ALUSHOW.vf}]] -set_property file_type Verilog $hdlfile -set_property library work $hdlfile -set_property top ALUSHOW $srcset -add_files [list {ALUSHOW.ucf}] -fileset [get_property constrset [current_run]] -open_rtl_design -part xc6slx16csg324-3 + +# PlanAhead Launch Script for Pre-Synthesis Floorplanning, created by Project Navigator + +create_project -name lab2 -dir "X:/My Documents/ec311/ec311-lab2/planAhead_run_2" -part xc6slx16csg324-3 +set_param project.pinAheadLayout yes +set srcset [get_property srcset [current_run -impl]] +set_property top ALUSHOW $srcset +set_property target_constrs_file "ALUSHOW.ucf" [current_fileset -constrset] +set hdlfile [add_files [list {sev_seg_disp.vf}]] +set_property file_type Verilog $hdlfile +set_property library work $hdlfile +set hdlfile [add_files [list {ALU.v}]] +set_property file_type Verilog $hdlfile +set_property library work $hdlfile +set hdlfile [add_files [list {ALUSHOW.vf}]] +set_property file_type Verilog $hdlfile +set_property library work $hdlfile +add_files [list {ALUSHOW.ucf}] -fileset [get_property constrset [current_run]] +open_rtl_design -part xc6slx16csg324-3 -- cgit v1.2.3-54-g00ecf