| ALUSHOW Project Status (02/15/2012 - 21:35:26) | |||
| Project File: | lab2.xise | Parser Errors: | No Errors |
| Module Name: | ALUSHOW | Implementation State: | Synthesized |
| Target Device: | xc6slx16-3csg324 |
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X 2 Errors (2 new) |
| Product Version: | ISE 13.4 |
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No Warnings |
| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Wed Feb 15 20:30:08 2012 | X 2 Errors (2 new) | 0 | 0 | |
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |