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-rw-r--r--_xmsgs/pn_parser.xmsgs30
1 files changed, 15 insertions, 15 deletions
diff --git a/_xmsgs/pn_parser.xmsgs b/_xmsgs/pn_parser.xmsgs
index d1c52e5..446c254 100644
--- a/_xmsgs/pn_parser.xmsgs
+++ b/_xmsgs/pn_parser.xmsgs
@@ -1,15 +1,15 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<!-- IMPORTANT: This is an internal file that has been generated -->
-<!-- by the Xilinx ISE software. Any direct editing or -->
-<!-- changes made to this file may result in unpredictable -->
-<!-- behavior or data corruption. It is strongly advised that -->
-<!-- users do not edit the contents of this file. -->
-<!-- -->
-<!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. -->
-
-<messages>
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;/home/michael/Documents/School/EC311/lab4/Test_ContdownController.v&quot; into library work</arg>
-</msg>
-
-</messages>
-
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated -->
+<!-- by the Xilinx ISE software. Any direct editing or -->
+<!-- changes made to this file may result in unpredictable -->
+<!-- behavior or data corruption. It is strongly advised that -->
+<!-- users do not edit the contents of this file. -->
+<!-- -->
+<!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. -->
+
+<messages>
+<msg type="info" file="ProjectMgmt" num="1835" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;X:/My Documents/ec311/ec311-lab4/Countdown.v&quot; into library work</arg>
+</msg>
+
+</messages>
+