From 11a0ed5a6e8af2e224caf1cb782829dfd8737b5e Mon Sep 17 00:00:00 2001
From: Michael Abed <michaelabed@gmail.com>
Date: Thu, 22 Mar 2012 16:14:11 -0400
Subject: updates

---
 CountdownController.v | 46 ++++++++++++++++++++++++++--------------------
 1 file changed, 26 insertions(+), 20 deletions(-)

(limited to 'CountdownController.v')

diff --git a/CountdownController.v b/CountdownController.v
index 35c84f9..626eef3 100644
--- a/CountdownController.v
+++ b/CountdownController.v
@@ -31,16 +31,20 @@ module CountdownController(
 reg [6:0] ssd;
 reg [3:0] AN;
 
-wire [6:0] ssdo;
-wire [3:0] ANo;
+wire [6:0] ssd1;
+wire [6:0] ssd2;
+wire [3:0] AN1;
+wire [3:0] AN2;
 
 // clocks
 wire seconds;
 wire dbclk;
-wire dispclk;
+wire dispclk;
+
+wire running;
 
 // buttons
-wire a, b;
+wire a, b, c;
 
 // bcd things
 wire [3:0] ad, bd;
@@ -50,34 +54,36 @@ wire [3:0] ado, bdo, cdo;
 wire [7:0] init;
 wire [7:0] tout;
 
-//ClockDivider dbc(.count(1_000_000), .rst(rst), .clk_in(clk), .clk_out(dbclk));
-//ClockDivider sec(.count(100_000_000), .rst(rst), .clk_in(clk), .clk_out(seconds));
-//ClockDivider dcc(.count(7_500_000), .rst(rst), .clk_in(clk), .clk_out(dispclk));
+ClockDivider dbc(.count(100), .rst(rst), .clk_in(clk), .clk_out(dbclk));
+ClockDivider sec(.count(100_000_000), .rst(rst), .clk_in(clk), .clk_out(seconds));
+ClockDivider dcc(.count(7_500_0), .rst(rst), .clk_in(clk), .clk_out(dispclk));
 
-ClockDivider dbc(.count(10), .rst(rst), .clk_in(clk), .clk_out(dbclk));
-ClockDivider sec(.count(100), .rst(rst), .clk_in(clk), .clk_out(seconds));
-ClockDivider dcc(.count(25), .rst(rst), .clk_in(clk), .clk_out(dispclk));
+//ClockDivider dbc(.count(24'd10), .rst(rst), .clk_in(clk), .clk_out(dbclk));
+//ClockDivider sec(.count(24'd100), .rst(rst), .clk_in(clk), .clk_out(seconds));
+//ClockDivider dcc(.count(24'd25), .rst(rst), .clk_in(clk), .clk_out(dispclk));
 
 
 debouncer dbA(.dout(a), .din(btnA), .rst(rst), .clk_1M(dbclk));
 debouncer dbB(.dout(b), .din(btnB), .rst(rst), .clk_1M(dbclk));
+debouncer dbC(.dout(c), .din(btnC), .rst(rst), .clk_1M(dbclk));
 
-Increment inc1(.value(ad), .btn(a));
-Increment inc2(.value(bd), .btn(b));
+Increment inc1(.value(ad), .btn(a), .rst(rst));
+Increment inc2(.value(bd), .btn(b), .rst(rst));
 
-//Increment inc1(.value(ad), .btn(btnA));
+//Increment inc1(.value(ad), .btn(btnA));
 //Increment inc2(.value(bd), .btn(btnB));
 
-BCD2Bin bcd2b(.hun(0), .ten(ad), .one(bd), .bin(init));
+BCD2Bin bcd2b(.hun(4'd0), .ten(ad), .one(bd), .bin(init));
 
-Countdown cntdwn(.t(tout), .rst(rst), .init(init), .clk_1hz(seconds), .start(btnC));
+Countdown cntdwn(.t(tout), .running(running), .rst(rst), .init(init), .clk_1hz(seconds), .start(c));
 
 Bin2BCD b2bcb(.hun(cdo), .ten(ado), .one(bdo), .bin(tout));
 
-DisplayController dispcont(.result(ssdo), .AN(ANo), .A(ado), .B(bdo), .clk_in(dispclk), .rst(rst));
-
-
-assign ssd = ssdo;
-assign AN = ANo;
+DisplayController dispcont1(.result(ssd1), .AN(AN1), .A(ado), .B(bdo), .clk_in(dispclk), .rst(rst));
+DisplayController dispcont2(.result(ssd2), .AN(AN2), .A(ad), .B(bd), .clk_in(dispclk), .rst(rst));
+always @(posedge clk) begin
+	ssd <= running ? ssd1 : ssd2;
+	AN <= running ? AN1 : AN2;
+end
 
 endmodule
-- 
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