From 2ac48fa0e44016a6cb49cab84a154eb7ec2dcab4 Mon Sep 17 00:00:00 2001
From: Michael Abed <michaelabed@gmail.com>
Date: Wed, 21 Mar 2012 13:17:47 -0400
Subject: Initial Commit

---
 fuse.xmsgs | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 fuse.xmsgs

(limited to 'fuse.xmsgs')

diff --git a/fuse.xmsgs b/fuse.xmsgs
new file mode 100644
index 0000000..39e40a2
--- /dev/null
+++ b/fuse.xmsgs
@@ -0,0 +1,51 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated
+     by the Xilinx ISE software.  Any direct editing or
+     changes made to this file may result in unpredictable
+     behavior or data corruption.  It is strongly advised that
+     users do not edit the contents of this file. -->
+<messages>
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/SevSegDisp.v" Line 27: Redeclaration of ansi port <arg fmt="%s" index="1">out</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/Increment.v" Line 26: Redeclaration of ansi port <arg fmt="%s" index="1">value</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/DisplayController.v" Line 30: Redeclaration of ansi port <arg fmt="%s" index="1">AN</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/DisplayController.v" Line 31: Redeclaration of ansi port <arg fmt="%s" index="1">result</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/Countdown.v" Line 29: Redeclaration of ansi port <arg fmt="%s" index="1">t</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/ClockDivider.v" Line 28: Redeclaration of ansi port <arg fmt="%s" index="1">clk_out</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/Bin2BCD.v" Line 28: Redeclaration of ansi port <arg fmt="%s" index="1">one</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/BCD2Bin.v" Line 28: Redeclaration of ansi port <arg fmt="%s" index="1">bin</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 31: Redeclaration of ansi port <arg fmt="%s" index="1">ssd</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="751" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 32: Redeclaration of ansi port <arg fmt="%s" index="1">AN</arg> is not allowed
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 54: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">count</arg>&gt;. Formal port size is <arg fmt="%d" index="2">24</arg>-bit while actual signal size is <arg fmt="%d" index="1">32</arg>-bit.
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 55: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">count</arg>&gt;. Formal port size is <arg fmt="%d" index="2">24</arg>-bit while actual signal size is <arg fmt="%d" index="1">32</arg>-bit.
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 53: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">count</arg>&gt;. Formal port size is <arg fmt="%d" index="2">24</arg>-bit while actual signal size is <arg fmt="%d" index="1">32</arg>-bit.
+</msg>
+
+<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/michael/Documents/School/EC311/lab4/CountdownController.v" Line 66: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">hun</arg>&gt;. Formal port size is <arg fmt="%d" index="2">4</arg>-bit while actual signal size is <arg fmt="%d" index="1">32</arg>-bit.
+</msg>
+
+</messages>
+
-- 
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