From 2ac48fa0e44016a6cb49cab84a154eb7ec2dcab4 Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Wed, 21 Mar 2012 13:17:47 -0400 Subject: Initial Commit --- isim.log | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 isim.log (limited to 'isim.log') diff --git a/isim.log b/isim.log new file mode 100644 index 0000000..5c43038 --- /dev/null +++ b/isim.log @@ -0,0 +1,18 @@ +ISim log file +Running: /home/michael/Documents/School/EC311/lab4/Test_ContdownController_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/michael/Documents/School/EC311/lab4/Test_ContdownController_isim_beh.wdb +ISim O.87xd (signature 0x8ddf5b5d) +WARNING: A WEBPACK license was found. +WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. +WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. +This is a Lite version of ISim. +WARNING: For instance uut/dbc/, width 24 of formal port count is not equal to width 32 of actual constant. +WARNING: For instance uut/sec/, width 24 of formal port count is not equal to width 32 of actual constant. +WARNING: For instance uut/dcc/, width 24 of formal port count is not equal to width 32 of actual constant. +WARNING: For instance uut/bcd2b/, width 4 of formal port hun is not equal to width 32 of actual constant. +Time resolution is 1 ps +# onerror resume +# wave add / +# run 1000ns +Simulator is doing circuit initialization process. +Finished circuit initialization process. +# exit 0 -- cgit v1.2.3