2 /CountdownController |home|michael|Documents|School|EC311|lab4|CountdownController.v/DisplayController - DisplayController CountdownController (X:/My Documents/ec311/ec311-lab4/CountdownController.v) 0 0 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000160000000020000000000000000000000000200000064ffffffff000000810000000300000002000001600000000100000003000000000000000100000003 true CountdownController (X:/My Documents/ec311/ec311-lab4/CountdownController.v) 1 Design Utilities 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000183000000010000000100000000000000000000000064ffffffff000000810000000000000001000001830000000100000000 false 1 debouncer.v 0 0 000000ff00000000000000010000000000000000010000000000000000000000000000000000000263000000040101000100000000000000000000000064ffffffff0000008100000000000000040000004a00000001000000000000006400000001000000000000007900000001000000000000013c0000000100000000 false debouncer.v 1 work 0 0 000000ff00000000000000010000000000000000010000000000000000000000000000000000000263000000010001000100000000000000000000000064ffffffff000000810000000000000001000002630000000100000000 false work 1 Implement Design/Map Implement Design/Place & Route Implement Design/Place & Route/Back-annotate Pin Locations Implement Design/Place & Route/Generate IBIS Model Implement Design/Place & Route/Generate Post-Place & Route Static Timing Implement Design/Translate Synthesize - XST Generate Programming File 7 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000e7000000010000000100000000000000000000000064ffffffff000000810000000000000001000000e70000000100000000 false Generate Programming File 2 /CountdownController |home|michael|Documents|School|EC311|lab4|CountdownController.v/DisplayController - DisplayController /DisplayController |home|michael|Documents|School|EC311|lab4|DisplayController.v /TEST_BCD2Bin |home|michael|Documents|School|EC311|lab4|TEST_BCD2Bin.v /TEST_Bin2BCD |home|michael|Documents|School|EC311|lab4|TEST_Bin2BCD.v /TEST_ClockDivider |home|michael|Documents|School|EC311|lab4|TEST_ClockDivider.v /TEST_DisplayController |home|michael|Documents|School|EC311|lab4|TEST_DisplayController.v /TEST_DisplayController |home|michael|Documents|School|EC311|lab4|TEST_DisplayController.v/uut - DisplayController /TEST_Increment |home|michael|Documents|School|EC311|lab4|TEST_Increment.v /TEST_SevSegDisp |home|michael|Documents|School|EC311|lab4|TEST_SevSegDisp.v TEST_Increment (X:/My Documents/ec311/ec311-lab4/TEST_Increment.v) 19 120 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000170000000020000000000000000000000000200000064ffffffff000000810000000300000002000001700000000100000003000000000000000100000003 true TEST_Increment (X:/My Documents/ec311/ec311-lab4/TEST_Increment.v) 1 Design Utilities/Compile HDL Simulation Libraries 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 false 1 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 false 2 /TEST_Bin2BCD |home|michael|Documents|School|EC311|lab4|TEST_Bin2BCD.v Unassigned User Library Modules 0 0 000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000010d000000020000000000000000000000000200000064ffffffff0000008100000003000000020000010d0000000100000003000000000000000100000003 false Unassigned User Library Modules 1 Compile HDL Simulation Libraries 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000183000000010000000100000000000000000000000064ffffffff000000810000000000000001000001830000000100000000 false Compile HDL Simulation Libraries 2 /TEST_Bin2BCD |home|michael|Documents|School|EC311|lab4|TEST_Bin2BCD.v Unassigned User Library Modules 0 0 000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000010d000000020000000000000000000000000200000064ffffffff0000008100000003000000020000010d0000000100000003000000000000000100000003 false Unassigned User Library Modules 1 Compile HDL Simulation Libraries 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000183000000010000000100000000000000000000000064ffffffff000000810000000000000001000001830000000100000000 false Compile HDL Simulation Libraries 2 /TEST_Bin2BCD |home|michael|Documents|School|EC311|lab4|TEST_Bin2BCD.v Unassigned User Library Modules 0 0 000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000010d000000020000000000000000000000000200000064ffffffff0000008100000003000000020000010d0000000100000003000000000000000100000003 false Unassigned User Library Modules 1 Compile HDL Simulation Libraries 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000183000000010000000100000000000000000000000064ffffffff000000810000000000000001000001830000000100000000 false Compile HDL Simulation Libraries 000000ff0000000000000002000000660000005a01000000060100000002 Implementation 1 User Constraints 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 false