FIRController Project Status
Project File: lab5.xise Parser Errors: No Errors
Module Name: FIRController Implementation State: New
Target Device: xc6slx16-3csg324
  • Errors:
 
Product Version:ISE 13.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 03/29/2012 - 15:16:18