From c5c3101483a4c2facd67f514f0c320b4192f5844 Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Thu, 5 Apr 2012 15:53:47 -0400 Subject: lab6 --- ClockDivider.v | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 ClockDivider.v (limited to 'ClockDivider.v') diff --git a/ClockDivider.v b/ClockDivider.v new file mode 100644 index 0000000..7ced5a7 --- /dev/null +++ b/ClockDivider.v @@ -0,0 +1,47 @@ +`timescale 1ns / 1ps +////////////////////////////////////////////////////////////////////////////////// +// Company: +// Engineer: +// +// Create Date: 15:24:11 03/16/2012 +// Design Name: +// Module Name: ClockDivider +// Project Name: +// Target Devices: +// Tool versions: +// Description: +// +// Dependencies: +// +// Revision: +// Revision 0.01 - File Created +// Additional Comments: +// +////////////////////////////////////////////////////////////////////////////////// +module ClockDivider( + input clk_in, + input rst, + input [23:0] count, + output clk_out + ); + +reg clk_out = 0; +reg [23:0] c = 0; + +always @(posedge clk_in or posedge rst) begin + if (rst == 1) begin + c = 0; + clk_out = 0; + end else if (c == count) begin + clk_out = ~clk_out; + c = 0; + end else begin + c = c + 24'd1; + end + + +end + + + +endmodule -- cgit v1.2.3