From d6d76f552c28503784d9ccd26528a4d8dada18ef Mon Sep 17 00:00:00 2001 From: Michael Abed Date: Sun, 2 Dec 2012 12:06:19 -0500 Subject: make a git repo --- fsm.v | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 fsm.v (limited to 'fsm.v') diff --git a/fsm.v b/fsm.v new file mode 100644 index 0000000..be94fc7 --- /dev/null +++ b/fsm.v @@ -0,0 +1,51 @@ +`timescale 1ns / 1ps +// FSM module +// +// drives the data path through multiple cycles + +module fsm( + output [3:0] state, + input [2:0] instrtype, + input rst, + input clk +); + +`include "params.v" + +reg [3:0] state, nextstate; + +always @(*) begin + if (rst) begin + nextstate = FETCH; + end else begin + case (state) + FETCH: nextstate = DECODE; + DECODE: if (instrtype == IINSTR || instrtype == RINSTR) + nextstate = ALUOP; + else if (instrtype == MEMRINSTR || instrtype == MEMWINSTR) + nextstate = MEMCALC; + else if (instrtype == BRINSTR) + nextstate = BRANCH; + else if (instrtype == JINSTR) + nextstate = JUMP; + MEMCALC: if (instrtype == MEMWINSTR) + nextstate = MEMWRITE; + else if (instrtype == MEMRINSTR) + nextstate = MEMREAD; + MEMWRITE: nextstate = FETCH; + MEMREAD: nextstate = MEMSTORE; + MEMSTORE: nextstate <= FETCH; + ALUOP: nextstate = ALUSTORE; + ALUSTORE: nextstate = FETCH; + BRANCH: nextstate = FETCH; + JUMP: nextstate = FETCH; + endcase + end +end + +always @(posedge clk or posedge rst) begin + state <= rst ? FETCH : nextstate; +end + +endmodule + -- cgit v1.2.3