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author | Michael Abed <michaelabed@gmail.com> | 2012-02-17 12:10:31 -0500 |
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committer | Michael Abed <michaelabed@gmail.com> | 2012-02-17 12:10:31 -0500 |
commit | 59d89428d6160fb672c2b6a41339505cc69344d0 (patch) | |
tree | a774e809a31fc7eae7b0fd0777714c86ffedc9d6 /ALU.cmd_log | |
parent | 0bdf2f0b18f7e2986336f8afc67fe18b8b382e7a (diff) | |
download | ec311-lab2-master.tar.gz ec311-lab2-master.tar.bz2 ec311-lab2-master.zip |
Diffstat (limited to 'ALU.cmd_log')
-rwxr-xr-x | ALU.cmd_log | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/ALU.cmd_log b/ALU.cmd_log index 044741b..12e59ad 100755 --- a/ALU.cmd_log +++ b/ALU.cmd_log @@ -8,3 +8,25 @@ vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog -prj lab2 -o ALU.spl -module ALU -template /home/michael/opt/Xilinx/13.4/ISE_DS/ISE//data/splveri.tft -deleteonerror spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym +vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
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