diff options
82 files changed, 473645 insertions, 1176 deletions
diff --git a/ALU.cmd_log b/ALU.cmd_log index 044741b..12e59ad 100755 --- a/ALU.cmd_log +++ b/ALU.cmd_log @@ -8,3 +8,25 @@ vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog -prj lab2 -o ALU.spl -module ALU -template /home/michael/opt/Xilinx/13.4/ISE_DS/ISE//data/splveri.tft -deleteonerror spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym +vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/ec311-lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl {X:/My Documents/ec311/ec311-lab2/ALU.sym}
@@ -1,9 +1,9 @@ -[Inputs] -=s[1:0]= -=a[3:0]= -[Outputs] -=o[3:0]= -[BiDir] -[ATTRIBUTES] -VeriModel ALU - +[Inputs]
+=s[1:0]=
+=a[3:0]=
+[Outputs]
+=o[3:0]=
+[BiDir]
+[ATTRIBUTES]
+VeriModel ALU
+
@@ -1,22 +1,22 @@ -<?xml version="1.0" encoding="UTF-8"?> -<symbol version="7" name="ALU"> - <symboltype>BLOCK</symboltype> - <timestamp>2012-2-16T2:38:45</timestamp> - <attr value="ALU" name="VeriModel" /> - <pin polarity="Input" x="0" y="416" name="s(1:0)" /> - <pin polarity="Input" x="0" y="480" name="a(3:0)" /> - <pin polarity="Output" x="384" y="416" name="o(3:0)" /> - <graph> - <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="192" y="-136" type="symbol" /> - <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="416" type="pin s(1:0)" /> - <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="480" type="pin a(3:0)" /> - <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="416" type="pin o(3:0)" /> - <rect width="64" x="0" y="404" height="24" /> - <line x2="0" y1="416" y2="416" x1="64" /> - <rect width="64" x="0" y="468" height="24" /> - <line x2="0" y1="480" y2="480" x1="64" /> - <rect width="64" x="320" y="404" height="24" /> - <line x2="384" y1="416" y2="416" x1="320" /> - <rect width="256" x="64" y="-128" height="640" /> - </graph> -</symbol> +<?xml version="1.0" encoding="UTF-8"?>
+<symbol version="7" name="ALU">
+ <symboltype>BLOCK</symboltype>
+ <timestamp>2012-2-17T2:14:34</timestamp>
+ <attr value="ALU" name="VeriModel" />
+ <pin polarity="Input" x="0" y="416" name="s(1:0)" />
+ <pin polarity="Input" x="0" y="480" name="a(3:0)" />
+ <pin polarity="Output" x="384" y="416" name="o(3:0)" />
+ <graph>
+ <attrtext style="alignment:BCENTER;fontsize:56;fontname:Arial" attrname="SymbolName" x="192" y="-136" type="symbol" />
+ <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="416" type="pin s(1:0)" />
+ <attrtext style="fontsize:24;fontname:Arial" attrname="PinName" x="72" y="480" type="pin a(3:0)" />
+ <attrtext style="alignment:RIGHT;fontsize:24;fontname:Arial" attrname="PinName" x="312" y="416" type="pin o(3:0)" />
+ <rect width="64" x="0" y="404" height="24" />
+ <line x2="0" y1="416" y2="416" x1="64" />
+ <rect width="64" x="0" y="468" height="24" />
+ <line x2="0" y1="480" y2="480" x1="64" />
+ <rect width="64" x="320" y="404" height="24" />
+ <line x2="384" y1="416" y2="416" x1="320" />
+ <rect width="256" x="64" y="-128" height="640" />
+ </graph>
+</symbol>
@@ -29,10 +29,10 @@ reg [3:0] o; always @ ( * )
begin
case ( s )
- 2'd0 : o = a;
- 2'd1 : o = ~a+1;
- 2'd2 : o = a >> 1;
- 2'd3 : o = a % 3;
+ 2'b00 : o = a;
+ 2'b01 : o = (a != 4'b1000 ) ? (~a)+1 : 4'b0111;
+ 2'b10 : o = (a[3] != 1'b1 ) ? a >> 1 : ~(((~a)+4'b0001) >> 1)+4'b0001;
+ 2'b11 : o = (a[3] != 1'b1 ) ? a % 3 : ~(((~a)+4'b0001) % 3)+1;
endcase
end
endmodule
diff --git a/ALUSHOW.bld b/ALUSHOW.bld new file mode 100755 index 0000000..2e77355 --- /dev/null +++ b/ALUSHOW.bld @@ -0,0 +1,36 @@ +Release 13.3 ngdbuild O.76xd (nt64) +Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. + +Command Line: C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64\unwrapped\ngdbuild.exe
+-intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3
+ALUSHOW.ngc ALUSHOW.ngd + +Reading NGO file "X:/My Documents/ec311/ec311-lab2/ALUSHOW.ngc" ... +Gathering constraint information from source properties... +Done. + +Annotating constraints to design from ucf file "ALUSHOW.ucf" ... +Resolving constraint associations... +Checking Constraint Associations... +Done... + +Checking expanded design ... + +Partition Implementation Status +------------------------------- + + No Partitions were found in this design. + +------------------------------- + +NGDBUILD Design Results Summary: + Number of errors: 0 + Number of warnings: 0 + +Total memory usage is 159008 kilobytes + +Writing NGD file "ALUSHOW.ngd" ... +Total REAL time to NGDBUILD completion: 5 sec +Total CPU time to NGDBUILD completion: 4 sec + +Writing NGDBUILD log file "ALUSHOW.bld"... diff --git a/ALUSHOW.cmd_log b/ALUSHOW.cmd_log index bf0d338..a5a7ca7 100755 --- a/ALUSHOW.cmd_log +++ b/ALUSHOW.cmd_log @@ -1 +1,69 @@ xst -intstyle ise -ifn "X:/My Documents/ec311/lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/lab2/ALUSHOW.syr"
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
+xst -intstyle ise -ifn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.xst" -ofn "X:/My Documents/ec311/ec311-lab2/ALUSHOW.syr"
+ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ALUSHOW.ucf -p xc6slx16-csg324-3 "ALUSHOW.ngc" ALUSHOW.ngd
+map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o ALUSHOW_map.ncd ALUSHOW.ngd ALUSHOW.pcf
+par -w -intstyle ise -ol high -mt off ALUSHOW_map.ncd ALUSHOW.ncd ALUSHOW.pcf
+trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml ALUSHOW.twx ALUSHOW.ncd -o ALUSHOW.twr ALUSHOW.pcf -ucf ALUSHOW.ucf
+bitgen -intstyle ise -f ALUSHOW.ut ALUSHOW.ncd
diff --git a/ALUSHOW.jhd b/ALUSHOW.jhd index 5a366ed..e6c57b1 100755 --- a/ALUSHOW.jhd +++ b/ALUSHOW.jhd @@ -1,5 +1,5 @@ -MODULE ALUSHOW - SUBMODULE sev_seg_disp - I |