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+vhdtdtfi -lib work {X:/My Documents/ec311/lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 ALU.spl {X:/My Documents/ec311/lab2/ALU.sym}
+vhdtdtfi -lib work {X:/My Documents/ec311/lab2/ALU.v} -lang verilog -prj lab2 -o ALU.spl -module ALU -template C:/Xilinx/13.3/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 ALU.spl {X:/My Documents/ec311/lab2/ALU.sym}
+vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog -prj lab2 -o ALU.spl -module ALU -template /home/michael/opt/Xilinx/13.4/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym
+vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog -prj lab2 -o ALU.spl -module ALU -template /home/michael/opt/Xilinx/13.4/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym
+vhdtdtfi -lib work /home/michael/Documents/School/EC311/lab2/ALU.v -lang verilog -prj lab2 -o ALU.spl -module ALU -template /home/michael/opt/Xilinx/13.4/ISE_DS/ISE//data/splveri.tft -deleteonerror
+spl2sym -intstyle ise -family spartan6 -w ALU.spl /home/michael/Documents/School/EC311/lab2/ALU.sym