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-rw-r--r--isim.log28
1 files changed, 10 insertions, 18 deletions
diff --git a/isim.log b/isim.log
index 5c43038..d3f13fd 100644
--- a/isim.log
+++ b/isim.log
@@ -1,18 +1,10 @@
-ISim log file
-Running: /home/michael/Documents/School/EC311/lab4/Test_ContdownController_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb /home/michael/Documents/School/EC311/lab4/Test_ContdownController_isim_beh.wdb
-ISim O.87xd (signature 0x8ddf5b5d)
-WARNING: A WEBPACK license was found.
-WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license.
-WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version.
-This is a Lite version of ISim.
-WARNING: For instance uut/dbc/, width 24 of formal port count is not equal to width 32 of actual constant.
-WARNING: For instance uut/sec/, width 24 of formal port count is not equal to width 32 of actual constant.
-WARNING: For instance uut/dcc/, width 24 of formal port count is not equal to width 32 of actual constant.
-WARNING: For instance uut/bcd2b/, width 4 of formal port hun is not equal to width 32 of actual constant.
-Time resolution is 1 ps
-# onerror resume
-# wave add /
-# run 1000ns
-Simulator is doing circuit initialization process.
-Finished circuit initialization process.
-# exit 0
+ISim log file
+Running: X:\My Documents\ec311\ec311-lab4\TEST_Countdown_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb X:/My Documents/ec311/ec311-lab4/TEST_Countdown_isim_beh.wdb
+ISim O.76xd (signature 0xc3576ebc)
+This is a Full version of ISim.
+Time resolution is 1 ps
+# onerror resume
+# wave add /
+# run 10000ns
+Simulator is doing circuit initialization process.
+Finished circuit initialization process.