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author | Michael Abed <michaelabed@gmail.com> | 2012-03-29 16:17:45 -0400 |
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committer | Michael Abed <michaelabed@gmail.com> | 2012-03-29 16:17:45 -0400 |
commit | 9540811daaffad7811475ea584333ab633ba8508 (patch) | |
tree | 9c20071e05b1225f9b466dede6236a7cd53ea851 /_xmsgs | |
parent | f9328ba21afde12326c04e59eb542446faf5fae4 (diff) | |
download | ec311-lab5-9540811daaffad7811475ea584333ab633ba8508.tar.gz ec311-lab5-9540811daaffad7811475ea584333ab633ba8508.tar.bz2 ec311-lab5-9540811daaffad7811475ea584333ab633ba8508.zip |
Diffstat (limited to '_xmsgs')
-rw-r--r-- | _xmsgs/pn_parser.xmsgs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/_xmsgs/pn_parser.xmsgs b/_xmsgs/pn_parser.xmsgs index 278dafe..4c3d12b 100644 --- a/_xmsgs/pn_parser.xmsgs +++ b/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,7 @@ <!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --> <messages> -<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "/home/michael/Documents/School/EC311/lab5/DisplayController.v" into library work</arg> +<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "/home/michael/Documents/School/EC311/lab5/FIRFilter.v" into library work</arg> </msg> </messages> |