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| author | Michael Abed <michaelabed@gmail.com> | 2012-02-16 15:46:19 -0500 |
|---|---|---|
| committer | Michael Abed <michaelabed@gmail.com> | 2012-02-16 15:46:19 -0500 |
| commit | 57738e75e221fe61a8f87270b430c0f1c0b8ead5 (patch) | |
| tree | 8ace7cfb1f8b7330e45dad06e4a21efeb2cadd64 /ALU_summary.html | |
| download | ec311-lab1-57738e75e221fe61a8f87270b430c0f1c0b8ead5.tar.gz ec311-lab1-57738e75e221fe61a8f87270b430c0f1c0b8ead5.tar.bz2 ec311-lab1-57738e75e221fe61a8f87270b430c0f1c0b8ead5.zip | |
initial commit
Diffstat (limited to 'ALU_summary.html')
| -rwxr-xr-x | ALU_summary.html | 343 |
1 files changed, 343 insertions, 0 deletions
diff --git a/ALU_summary.html b/ALU_summary.html new file mode 100755 index 0000000..840a7a1 --- /dev/null +++ b/ALU_summary.html @@ -0,0 +1,343 @@ +<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD> +<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'> +<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'> +<TD ALIGN=CENTER COLSPAN='4'><B>ALU Project Status</B></TD></TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD> +<TD>lab1.xise</TD> +<TD BGCOLOR='#FFFF99'><b>Parser Errors:</b></TD> +<TD> No Errors </TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD> +<TD>ALU</TD> +<TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD> +<TD>Placed and Routed</TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD> +<TD>xc6slx16-3csg324</TD> +<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD> +<TD> +No Errors</TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 13.4</TD> +<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD> +<TD ALIGN=LEFT><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/_xmsgs/*.xmsgs?&DataKey=Warning'>2 Warnings (0 new)</A></TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD> +<TD>Balanced</TD> +<TD BGCOLOR='#FFFF99'><UL><LI><B>Routing Results:</B></LI></UL></TD> +<TD> +<A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.unroutes'>All Signals Completely Routed</A></TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Design Strategy:</B></dif></TD> +<TD><A HREF_DISABLED='Xilinx Default (unlocked)?&DataKey=Strategy'>Xilinx Default (unlocked)</A></TD> +<TD BGCOLOR='#FFFF99'><UL><LI><B>Timing Constraints:</B></LI></UL></TD> +<TD> </TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Environment:</B></dif></TD> +<TD> +<A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU_envsettings.html'> +System Settings</A> +</TD> +<TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD> +<TD>0 <A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.twx?&DataKey=XmlTimingReport'>(Timing Report)</A></TD> +</TR> +</TABLE> + + + + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>Device Utilization Summary</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DeviceUtilizationSummary"><B>[-]</B></a></TD></TR> +<TR ALIGN=CENTER BGCOLOR='#FFFF99'> +<TD ALIGN=LEFT><B>Slice Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD COLSPAN='2'><B>Note(s)</B></TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Registers</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>18,224</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>9,112</TD> +<TD ALIGN=RIGHT>1%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as logic</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>9,112</TD> +<TD ALIGN=RIGHT>1%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD> +<TD ALIGN=RIGHT>13</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD> +<TD ALIGN=RIGHT>0</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD> +<TD ALIGN=RIGHT>0</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ROM</TD> +<TD ALIGN=RIGHT>0</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Memory</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>2,176</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD> +<TD ALIGN=RIGHT>5</TD> +<TD ALIGN=RIGHT>2,278</TD> +<TD ALIGN=RIGHT>1%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Nummber of MUXCYs used</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>4,556</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD> +<TD ALIGN=RIGHT>13</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused Flip Flop</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>100%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused LUT</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of fully used LUT-FF pairs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>13</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of slice register sites lost<BR> to control set restrictions</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>18,224</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded <A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU_map.xrpt?&DataKey=IOBProperties'>IOBs</A></TD> +<TD ALIGN=RIGHT>18</TD> +<TD ALIGN=RIGHT>232</TD> +<TD ALIGN=RIGHT>7%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of LOCed IOBs</TD> +<TD ALIGN=RIGHT>18</TD> +<TD ALIGN=RIGHT>18</TD> +<TD ALIGN=RIGHT>100%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB16BWERs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>32</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB8BWERs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>64</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2/BUFIO2_2CLKs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>32</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2FB/BUFIO2FB_2CLKs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>32</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFG/BUFGMUXs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>16</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DCM/DCM_CLKGENs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>4</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ILOGIC2/ISERDES2s</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>248</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of IODELAY2/IODRP2/IODRP2_MCBs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>248</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of OLOGIC2/OSERDES2s</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>248</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BSCANs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>4</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFHs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>128</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLLs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>8</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLL_MCBs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>4</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DSP48A1s</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>32</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ICAPs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>1</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of MCBs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>2</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PCILOGICSEs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>2</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PLL_ADVs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>2</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PMVs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>1</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of STARTUPs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>1</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of SUSPEND_SYNCs</TD> +<TD ALIGN=RIGHT>0</TD> +<TD ALIGN=RIGHT>1</TD> +<TD ALIGN=RIGHT>0%</TD> +<TD COLSPAN='2'> </TD> +</TR> +<TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD> +<TD ALIGN=RIGHT>3.32</TD> +<TD> </TD> +<TD> </TD> +<TD COLSPAN='2'> </TD> +</TR> +</TABLE> + + + + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Performance Summary</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=PerformanceSummary"><B>[-]</B></a></TD></TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD> +<TD>0 (Setup: 0, Hold: 0)</TD> +<TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD> +<TD COLSPAN='2'><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU_par.xrpt?&DataKey=PinoutData'>Pinout Report</A></TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Routing Results:</B></TD><TD> +<A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.unroutes'>All Signals Completely Routed</A></TD> +<TD BGCOLOR='#FFFF99'><B>Clock Data:</B></TD> +<TD COLSPAN='2'><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU_par.xrpt?&DataKey=ClocksData'>Clock Report</A></TD> +</TR> +<TR ALIGN=LEFT> +<TD BGCOLOR='#FFFF99'><B>Timing Constraints:</B></TD> +<TD> </TD> +<TD BGCOLOR='#FFFF99'><B> </B></TD> +<TD COLSPAN='2'> </TD> +</TABLE> + + + + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR> +<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD> +<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Feb 15 18:59:45 2012</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/_xmsgs/xst.xmsgs?&DataKey=Warning'>2 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Feb 15 18:59:45 2012</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Feb 15 18:59:45 2012</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/_xmsgs/map.xmsgs?&DataKey=Info'>6 Infos (6 new)</A></TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Feb 15 18:59:46 2012</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/_xmsgs/par.xmsgs?&DataKey=Info'>2 Infos (2 new)</A></TD></TR> +<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/ALU.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Wed Feb 15 18:59:46 2012</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/_xmsgs/trce.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR> +<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR> +</TABLE> + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR> +<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Feb 15 18:59:48 2012</TD></TR> +<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/michael/Documents/School/EC311/lab1/webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Feb 15 18:59:48 2012</TD></TR> +</TABLE> + + +<br><center><b>Date Generated:</b> 02/15/2012 - 19:01:09</center> +</BODY></HTML>
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