make it workHEADmaster

1 files changed, 19 insertions, 20 deletions

diff --git a/Divide_2.vf b/Divide_2.vf
index a09efec..453ee10 100755
--- a/Divide_2.vf
+++ b/Divide_2.vf
@@ -7,11 +7,11 @@
 // \   \   \/     Version : 13.3

 //  \   \         Application : sch2hdl

 //  /   /         Filename : Divide_2.vf

-// /___/   /\     Timestamp : 02/15/2012 15:00:06

+// /___/   /\     Timestamp : 02/16/2012 19:28:08

 // \   \  /  \ 

 //  \___\/\___\ 

 //

-//Command: sch2hdl -intstyle ise -family spartan6 -verilog "X:/My Documents/ec311/lab1/Divide_2.vf" -w "X:/My Documents/ec311/lab1/Divide_2.sch"

+//Command: sch2hdl -intstyle ise -family spartan6 -verilog "X:/My Documents/ec311/ec311-lab1/Divide_2.vf" -w "X:/My Documents/ec311/ec311-lab1/Divide_2.sch"

 //Design Name: Divide_2

 //Device: spartan6

 //Purpose:

@@ -32,23 +32,22 @@ module Divide_2(b0,
     input b3;

    output result;

    

-   wire XLXN_1;

-   wire XLXN_2;

-   wire XLXN_3;

-   wire XLXN_7;

+   wire XLXN_9;

+   wire XLXN_13;

+   wire XLXN_14;

+   wire XLXN_15;

    

-   OR3  XLXI_1 (.I0(XLXN_1), 

-               .I1(XLXN_7), 

-               .I2(XLXN_3), 

-               .O(result));

-   AND3  XLXI_2 (.I0(XLXN_2), 

-                .I1(b3), 

-                .I2(b1), 

-                .O(XLXN_1));

-   INV  XLXI_3 (.I(b2), 

-               .O(XLXN_2));

-   INV  XLXI_4 (.I(b0), 

-               .O(XLXN_3));

-   INV  XLXI_9 (.I(b1), 

-               .O(XLXN_7));

+   AND2  XLXI_10 (.I0(XLXN_9), 

+                 .I1(b3), 

+                 .O(result));

+   OR3  XLXI_12 (.I0(XLXN_15), 

+                .I1(XLXN_14), 

+                .I2(XLXN_13), 

+                .O(XLXN_9));

+   INV  XLXI_13 (.I(b0), 

+                .O(XLXN_13));

+   INV  XLXI_15 (.I(b1), 

+                .O(XLXN_14));

+   INV  XLXI_16 (.I(b2), 

+                .O(XLXN_15));

 endmodule