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+////////////////////////////////////////////////////////////////////////////////
+// Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
+////////////////////////////////////////////////////////////////////////////////
+//   ____  ____ 
+//  /   /\/   / 
+// /___/  \  /    Vendor: Xilinx 
+// \   \   \/     Version : 13.4
+//  \   \         Application : sch2hdl
+//  /   /         Filename : ALUSHOW.vf
+// /___/   /\     Timestamp : 02/15/2012 21:35:26
+// \   \  /  \ 
+//  \___\/\___\ 
+//
+//Command: sch2hdl -intstyle ise -family spartan6 -verilog /home/michael/Documents/School/EC311/lab2/ALUSHOW.vf -w /home/michael/Documents/School/EC311/lab2/ALUSHOW.sch
+//Design Name: ALUSHOW
+//Device: spartan6
+//Purpose:
+//    This verilog netlist is translated from an ECS schematic.It can be 
+//    synthesized and simulated, but it should not be modified. 
+//
+`timescale 1ns / 1ps
+
+module sev_seg_disp_MUSER_ALUSHOW(A, 
+                                  B, 
+                                  C, 
+                                  D, 
+                                  AN0, 
+                                  AN1, 
+                                  AN2, 
+                                  AN3, 
+                                  a_out, 
+                                  b_out, 
+                                  c_out, 
+                                  d_out, 
+                                  e_out, 
+                                  f_out, 
+                                  g_out, 
+                                  sign);
+
+    input A;
+    input B;
+    input C;
+    input D;
+   output AN0;
+   output AN1;
+   output AN2;
+   output AN3;
+   output a_out;
+   output b_out;
+   output c_out;
+   output d_out;
+   output e_out;
+   output f_out;
+   output g_out;
+   output sign;
+   
+   wire A_BAR;
+   wire B_BAR;
+   wire C_BAR;
+   wire D_BAR;
+   wire XLXN_14;
+   wire XLXN_24;
+   wire XLXN_61;
+   wire XLXN_62;
+   wire XLXN_63;
+   wire XLXN_64;
+   wire XLXN_65;
+   wire XLXN_91;
+   wire XLXN_92;
+   wire XLXN_93;
+   wire XLXN_94;
+   wire XLXN_105;
+   wire XLXN_113;
+   wire XLXN_114;
+   wire XLXN_125;
+   wire XLXN_126;
+   wire XLXN_128;
+   wire XLXN_129;
+   wire XLXN_130;
+   wire XLXN_131;
+   wire XLXN_145;
+   wire XLXN_146;
+   wire XLXN_147;
+   wire XLXN_148;
+   wire XLXN_149;
+   wire XLXN_151;
+   wire XLXN_155;
+   wire XLXN_156;
+   wire XLXN_158;
+   wire XLXN_160;
+   wire XLXN_162;
+   wire XLXN_165;
+   
+   BUF  XLXI_5 (.I(XLXN_14), 
+               .O(AN0));
+   BUF  XLXI_6 (.I(XLXN_14), 
+               .O(AN1));
+   BUF  XLXI_7 (.I(XLXN_14), 
+               .O(AN2));
+   BUF  XLXI_8 (.I(XLXN_24), 
+               .O(AN3));
+   GND  XLXI_11 (.G(XLXN_24));
+   VCC  XLXI_12 (.P(XLXN_14));
+   AND3  XLXI_30 (.I0(B), 
+                 .I1(C_BAR), 
+                 .I2(D), 
+                 .O(XLXN_61));
+   AND3  XLXI_31 (.I0(A_BAR), 
+                 .I1(D), 
+                 .I2(C), 
+                 .O(XLXN_62));
+   AND2  XLXI_32 (.I0(B_BAR), 
+                 .I1(D_BAR), 
+                 .O(XLXN_63));
+   AND2  XLXI_33 (.I0(C), 
+                 .I1(D_BAR), 
+                 .O(XLXN_64));
+   OR5  XLXI_34 (.I0(XLXN_65), 
+                .I1(XLXN_64), 
+                .I2(XLXN_63), 
+                .I3(XLXN_62), 
+                .I4(XLXN_61), 
+                .O(XLXN_149));
+   AND2  XLXI_35 (.I0(B_BAR), 
+                 .I1(A), 
+                 .O(XLXN_65));
+   INV  XLXI_37 (.I(A), 
+                .O(A_BAR));
+   INV  XLXI_38 (.I(B), 
+                .O(B_BAR));
+   INV  XLXI_39 (.I(C), 
+                .O(C_BAR));
+   INV  XLXI_40 (.I(D), 
+                .O(D_BAR));
+   OR4  XLXI_41 (.I0(XLXN_94), 
+                .I1(XLXN_93), 
+                .I2(XLXN_92), 
+                .I3(XLXN_91), 
+                .O(XLXN_151));
+   XNOR2  XLXI_42 (.I0(B), 
+                  .I1(A), 
+                  .O(XLXN_91));
+   AND2  XLXI_43 (.I0(D_BAR), 
+                 .I1(C_BAR), 
+                 .O(XLXN_92));
+   AND2  XLXI_44 (.I0(B_BAR), 
+                 .I1(C_BAR), 
+                 .O(XLXN_93));
+   AND3  XLXI_45 (.I0(A_BAR), 
+                 .I1(D), 
+                 .I2(C), 
+                 .O(XLXN_94));
+   XOR2  XLXI_46 (.I0(B), 
+                 .I1(A), 
+                 .O(XLXN_105));
+   OR3  XLXI_47 (.I0(D), 
+                .I1(C_BAR), 
+                .I2(XLXN_105), 
+                .O(XLXN_155));
+   AND2  XLXI_48 (.I0(D_BAR), 
+                 .I1(C), 
+                 .O(XLXN_125));
+   AND2  XLXI_49 (.I0(D_BAR), 
+                 .I1(B_BAR), 
+                 .O(XLXN_126));
+   AND2  XLXI_50 (.I0(C), 
+                 .I1(B_BAR), 
+                 .O(XLXN_113));
+   AND3  XLXI_51 (.I0(C_BAR), 
+                 .I1(D), 
+                 .I2(B), 
+                 .O(XLXN_114));
+   OR4  XLXI_52 (.I0(XLXN_114), 
+                .I1(XLXN_113), 
+                .I2(XLXN_126), 
+                .I3(XLXN_125), 
+                .O(XLXN_156));
+   OR2  XLXI_53 (.I0(XLXN_126), 
+                .I1(XLXN_125), 
+                .O(XLXN_158));
+   AND3  XLXI_54 (.I0(C_BAR), 
+                 .I1(B), 
+                 .I2(A_BAR), 
+                 .O(XLXN_128));
+   AND3  XLXI_55 (.I0(C), 
+                 .I1(B_BAR), 
+                 .I2(A), 
+                 .O(XLXN_129));
+   AND3  XLXI_56 (.I0(D_BAR), 
+                 .I1(B), 
+                 .I2(A_BAR), 
+                 .O(XLXN_130));
+   AND2  XLXI_57 (.I0(D_BAR), 
+                 .I1(C_BAR), 
+                 .O(XLXN_131));
+   OR4  XLXI_58 (.I0(XLXN_131), 
+                .I1(XLXN_130), 
+                .I2(XLXN_129), 
+                .I3(XLXN_128), 
+                .O(XLXN_160));
+   OR4  XLXI_60 (.I0(XLXN_148), 
+                .I1(XLXN_147), 
+                .I2(XLXN_146), 
+                .I3(XLXN_145), 
+                .O(XLXN_162));
+   AND2  XLXI_61 (.I0(C_BAR), 
+                 .I1(B), 
+                 .O(XLXN_145));
+   AND2  XLXI_62 (.I0(D_BAR), 
+                 .I1(C), 
+                 .O(XLXN_146));
+   AND2  XLXI_63 (.I0(B_BAR), 
+                 .I1(C), 
+                 .O(XLXN_147));
+   AND2  XLXI_64 (.I0(D_BAR), 
+                 .I1(A), 
+                 .O(XLXN_148));
+   INV  XLXI_65 (.I(XLXN_149), 
+                .O(a_out));
+   INV  XLXI_66 (.I(XLXN_151), 
+                .O(b_out));
+   INV  XLXI_67 (.I(XLXN_155), 
+                .O(c_out));
+   INV  XLXI_68 (.I(XLXN_158), 
+                .O(e_out));
+   INV  XLXI_69 (.I(XLXN_156), 
+                .O(d_out));
+   INV  XLXI_70 (.I(XLXN_160), 
+                .O(f_out));
+   INV  XLXI_71 (.I(XLXN_162), 
+                .O(g_out));
+   INV  XLXI_72 (.I(A_BAR), 
+                .O(XLXN_165));
+   INV  XLXI_73 (.I(XLXN_165), 
+                .O(sign));
+endmodule
+`timescale 1ns / 1ps
+
+module ALUSHOW(AN0, 
+               AN1, 
+               AN2, 
+               AN3, 
+               ao, 
+               bo, 
+               co, 
+               do, 
+               eo, 
+               fo, 
+               go, 
+               sign);
+
+   output AN0;
+   output AN1;
+   output AN2;
+   output AN3;
+   output ao;
+   output bo;
+   output co;
+   output do;
+   output eo;
+   output fo;
+   output go;
+   output sign;
+   
+   wire [3:0] ALU_OUT;
+   
+   sev_seg_disp_MUSER_ALUSHOW  XLXI_2 (.A(ALU_OUT[0]), 
+                                      .B(ALU_OUT[1]), 
+                                      .C(ALU_OUT[2]), 
+                                      .D(ALU_OUT[3]), 
+                                      .AN0(AN0), 
+                                      .AN1(AN1), 
+                                      .AN2(AN2), 
+                                      .AN3(AN3), 
+                                      .a_out(ao), 
+                                      .b_out(bo), 
+                                      .c_out(co), 
+                                      .d_out(do), 
+                                      .e_out(eo), 
+                                      .f_out(fo), 
+                                      .g_out(go), 
+                                      .sign(sign));
+   ALU  XLXI_4 (.a(), 
+               .s(), 
+               .o(ALU_OUT[3:0]));
+endmodule