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| author | Michael Abed <michaelabed@gmail.com> | 2012-03-21 13:44:29 -0400 |
|---|---|---|
| committer | Michael Abed <michaelabed@gmail.com> | 2012-03-21 13:44:29 -0400 |
| commit | 1a28b82559b9fe09de7f18249d0ca4870fa9c501 (patch) | |
| tree | c976cb499e844a2190cd9a8344076ef32c0912e6 /_xmsgs | |
| parent | 2ac48fa0e44016a6cb49cab84a154eb7ec2dcab4 (diff) | |
| download | ec311-lab4-1a28b82559b9fe09de7f18249d0ca4870fa9c501.tar.gz ec311-lab4-1a28b82559b9fe09de7f18249d0ca4870fa9c501.tar.bz2 ec311-lab4-1a28b82559b9fe09de7f18249d0ca4870fa9c501.zip | |
Adjust timings for real board
Diffstat (limited to '_xmsgs')
| -rw-r--r-- | _xmsgs/pn_parser.xmsgs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/_xmsgs/pn_parser.xmsgs b/_xmsgs/pn_parser.xmsgs index 009b8f5..16c15fd 100644 --- a/_xmsgs/pn_parser.xmsgs +++ b/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,7 @@ <!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --> <messages> -<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "/home/michael/Documents/School/EC311/lab4/Countdown.v" into library work</arg> +<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "/home/michael/Documents/School/EC311/lab4/CountdownController.v" into library work</arg> </msg> </messages> |