diff options
| author | Michael Abed <michaelabed@gmail.com> | 2012-02-17 12:10:31 -0500 |
|---|---|---|
| committer | Michael Abed <michaelabed@gmail.com> | 2012-02-17 12:10:31 -0500 |
| commit | 59d89428d6160fb672c2b6a41339505cc69344d0 (patch) | |
| tree | a774e809a31fc7eae7b0fd0777714c86ffedc9d6 /ALUSHOW_envsettings.html | |
| parent | 0bdf2f0b18f7e2986336f8afc67fe18b8b382e7a (diff) | |
| download | ec311-lab2-59d89428d6160fb672c2b6a41339505cc69344d0.tar.gz ec311-lab2-59d89428d6160fb672c2b6a41339505cc69344d0.tar.bz2 ec311-lab2-59d89428d6160fb672c2b6a41339505cc69344d0.zip | |
Diffstat (limited to 'ALUSHOW_envsettings.html')
| -rw-r--r-- | ALUSHOW_envsettings.html | 234 |
1 files changed, 192 insertions, 42 deletions
diff --git a/ALUSHOW_envsettings.html b/ALUSHOW_envsettings.html index 2c8f42b..1613018 100644 --- a/ALUSHOW_envsettings.html +++ b/ALUSHOW_envsettings.html @@ -14,53 +14,53 @@ <td><b>par</b></td> </tr> <tr> -<td>PATH</td> -<td>C:<br>\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;C:<br>\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;C:<br>\Xilinx\13.3\ISE_DS\PlanAhead\bin;C:<br>\Xilinx\13.3\ISE_DS\ISE\bin\nt64;C:<br>\Xilinx\13.3\ISE_DS\ISE\lib\nt64;C:<br>\Xilinx\13.3\ISE_DS\EDK\bin\nt64;C:<br>\Xilinx\13.3\ISE_DS\EDK\lib\nt64;C:<br>\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt64\bin;C:<br>\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;C:<br>\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin;C:<br>\Xilinx\13.3\ISE_DS\common\bin\nt64;C:<br>\Xilinx\13.3\ISE_DS\common\lib\nt64;C:<br>\Windows\system32;C:<br>\Windows;C:<br>\Windows\System32\Wbem;C:<br>\Windows\System32\WindowsPowerShell\v1.0\;C:<br>\Program Files\MATLAB\R2011a\runtime\win64;C:<br>\Program Files\MATLAB\R2011a\bin;C:<br>\VXIPNP\WinNT\Bin;C:<br>\Program Files (x86)\Altium Designer Summer 09\System;C:<br>\Program Files (x86)\QuickTime\QTSystem\;C:<br>\Program Files\NetBeans 7.0.1\java\ant\bin;C:<br>\Program Files\Java\jdk1.6.0_27\bin;C:<br>\Program Files\TortoiseSVN\bin;C:<br>\Program Files (x86)\Rational\Rose RealTime\bin\win32;C:<br>\Program Files (x86)\Rational\common;C:<br>\Cadence\SPB_16.5\OpenAccess\bin\win32\opt;C:<br>\Cadence\SPB_16.5\tools\Capture;C:<br>\Cadence\SPB_16.5\tools\PSpice\Library;C:<br>\Cadence\SPB_16.5\tools\PSpice;C:<br>\Cadence\SPB_16.5\tools\specctra\bin;C:<br>\Cadence\SPB_16.5\tools\fet\bin;C:<br>\Cadence\SPB_16.5\tools\libutil\bin;C:<br>\Cadence\SPB_16.5\tools\bin;C:<br>\Cadence\SPB_16.5\tools\pcb\bin</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>PATHEXT</td> +<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td> +<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td> +<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td> +<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td> </tr> <tr> -<td>PATHEXT</td> -<td>.COM;.EXE;.BAT;.CMD;.VBS;.VBE;.JS;.JSE;.WSF;.WSH;.MSC</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>Path</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.3\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\MATLAB\R2011a\runtime\win64;<br>C:\Program Files\MATLAB\R2011a\bin;<br>C:\VXIPNP\WinNT\Bin;<br>C:\Program Files (x86)\Altium Designer Summer 09\System;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files\NetBeans 7.0.1\java\ant\bin;<br>C:\Program Files\Java\jdk1.6.0_27\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Rational\Rose RealTime\bin\win32;<br>C:\Program Files (x86)\Rational\common;<br>C:\Cadence\SPB_16.5\OpenAccess\bin\win32\opt;<br>C:\Cadence\SPB_16.5\tools\Capture;<br>C:\Cadence\SPB_16.5\tools\PSpice\Library;<br>C:\Cadence\SPB_16.5\tools\PSpice;<br>C:\Cadence\SPB_16.5\tools\specctra\bin;<br>C:\Cadence\SPB_16.5\tools\fet\bin;<br>C:\Cadence\SPB_16.5\tools\libutil\bin;<br>C:\Cadence\SPB_16.5\tools\bin;<br>C:\Cadence\SPB_16.5\tools\pcb\bin</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.3\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\MATLAB\R2011a\runtime\win64;<br>C:\Program Files\MATLAB\R2011a\bin;<br>C:\VXIPNP\WinNT\Bin;<br>C:\Program Files (x86)\Altium Designer Summer 09\System;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files\NetBeans 7.0.1\java\ant\bin;<br>C:\Program Files\Java\jdk1.6.0_27\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Rational\Rose RealTime\bin\win32;<br>C:\Program Files (x86)\Rational\common;<br>C:\Cadence\SPB_16.5\OpenAccess\bin\win32\opt;<br>C:\Cadence\SPB_16.5\tools\Capture;<br>C:\Cadence\SPB_16.5\tools\PSpice\Library;<br>C:\Cadence\SPB_16.5\tools\PSpice;<br>C:\Cadence\SPB_16.5\tools\specctra\bin;<br>C:\Cadence\SPB_16.5\tools\fet\bin;<br>C:\Cadence\SPB_16.5\tools\libutil\bin;<br>C:\Cadence\SPB_16.5\tools\bin;<br>C:\Cadence\SPB_16.5\tools\pcb\bin</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.3\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\MATLAB\R2011a\runtime\win64;<br>C:\Program Files\MATLAB\R2011a\bin;<br>C:\VXIPNP\WinNT\Bin;<br>C:\Program Files (x86)\Altium Designer Summer 09\System;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files\NetBeans 7.0.1\java\ant\bin;<br>C:\Program Files\Java\jdk1.6.0_27\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Rational\Rose RealTime\bin\win32;<br>C:\Program Files (x86)\Rational\common;<br>C:\Cadence\SPB_16.5\OpenAccess\bin\win32\opt;<br>C:\Cadence\SPB_16.5\tools\Capture;<br>C:\Cadence\SPB_16.5\tools\PSpice\Library;<br>C:\Cadence\SPB_16.5\tools\PSpice;<br>C:\Cadence\SPB_16.5\tools\specctra\bin;<br>C:\Cadence\SPB_16.5\tools\fet\bin;<br>C:\Cadence\SPB_16.5\tools\libutil\bin;<br>C:\Cadence\SPB_16.5\tools\bin;<br>C:\Cadence\SPB_16.5\tools\pcb\bin</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.3\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.3\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.3\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.3\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\MATLAB\R2011a\runtime\win64;<br>C:\Program Files\MATLAB\R2011a\bin;<br>C:\VXIPNP\WinNT\Bin;<br>C:\Program Files (x86)\Altium Designer Summer 09\System;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files\NetBeans 7.0.1\java\ant\bin;<br>C:\Program Files\Java\jdk1.6.0_27\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Rational\Rose RealTime\bin\win32;<br>C:\Program Files (x86)\Rational\common;<br>C:\Cadence\SPB_16.5\OpenAccess\bin\win32\opt;<br>C:\Cadence\SPB_16.5\tools\Capture;<br>C:\Cadence\SPB_16.5\tools\PSpice\Library;<br>C:\Cadence\SPB_16.5\tools\PSpice;<br>C:\Cadence\SPB_16.5\tools\specctra\bin;<br>C:\Cadence\SPB_16.5\tools\fet\bin;<br>C:\Cadence\SPB_16.5\tools\libutil\bin;<br>C:\Cadence\SPB_16.5\tools\bin;<br>C:\Cadence\SPB_16.5\tools\pcb\bin</td> </tr> <tr> <td>XILINX</td> -<td>C:<br>\Xilinx\13.3\ISE_DS\ISE\</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE\</td> </tr> <tr> <td>XILINXD_LICENSE_FILE</td> <td>2100@XilinxLM.bu.edu</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>2100@XilinxLM.bu.edu</td> +<td>2100@XilinxLM.bu.edu</td> +<td>2100@XilinxLM.bu.edu</td> </tr> <tr> <td>XILINX_DSP</td> -<td>C:<br>\Xilinx\13.3\ISE_DS\ISE</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>C:\Xilinx\13.3\ISE_DS\ISE</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE</td> +<td>C:\Xilinx\13.3\ISE_DS\ISE</td> </tr> <tr> <td>XILINX_EDK</td> -<td>C:<br>\Xilinx\13.3\ISE_DS\EDK</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>C:\Xilinx\13.3\ISE_DS\EDK</td> +<td>C:\Xilinx\13.3\ISE_DS\EDK</td> +<td>C:\Xilinx\13.3\ISE_DS\EDK</td> +<td>C:\Xilinx\13.3\ISE_DS\EDK</td> </tr> <tr> <td>XILINX_PLANAHEAD</td> -<td>C:<br>\Xilinx\13.3\ISE_DS\PlanAhead</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>C:\Xilinx\13.3\ISE_DS\PlanAhead</td> +<td>C:\Xilinx\13.3\ISE_DS\PlanAhead</td> +<td>C:\Xilinx\13.3\ISE_DS\PlanAhead</td> +<td>C:\Xilinx\13.3\ISE_DS\PlanAhead</td> </tr> </TABLE> <A NAME="Synthesis Property Settings"></A> @@ -351,6 +351,156 @@ <td>0</td> </tr> </TABLE> +<A NAME="Translation Property Settings"></A> + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'> +<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD> +</tr> +<tr bgcolor='#ffff99'> +<td><b>Switch Name</b></td> +<td><b>Property Name</b></td> +<td><b>Value</b></td> +<td><b>Default Value</b></td> +</tr> +<tr> +<td>-intstyle</td> +<td> </td> +<td>ise</td> +<td>None</td> +</tr> +<tr> +<td>-dd</td> +<td> </td> +<td>_ngo</td> +<td>None</td> +</tr> +<tr> +<td>-p</td> +<td> </td> +<td>xc6slx16-csg324-3</td> +<td>None</td> +</tr> +<tr> +<td>-uc</td> +<td> </td> +<td>ALUSHOW.ucf</td> +<td>None</td> +</tr> +</TABLE> +<A NAME="Map Property Settings"></A> + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'> +<TD ALIGN=CENTER COLSPAN='4'><B>Map Property Settings </B></TD> +</tr> +<tr bgcolor='#ffff99'> +<td><b>Switch Name</b></td> +<td><b>Property Name</b></td> +<td><b>Value</b></td> +<td><b>Default Value</b></td> +</tr> +<tr> +<td>-ol</td> +<td>Place & Route Effort Level (Overall)</td> +<td>high</td> +<td>high</td> +</tr> +<tr> +<td>-xt</td> +<td>Extra Cost Tables</td> +<td>0</td> +<td>0</td> +</tr> +<tr> +<td>-ir</td> +<td>Use RLOC Constraints</td> +<td>OFF</td> +<td>OFF</td> +</tr> +<tr> +<td>-t</td> +<td>Starting Placer Cost Table (1-100) Map</td> +<td>1</td> +<td>0</td> +</tr> +<tr> +<td>-r</td> +<td>Register Ordering</td> +<td>4</td> +<td>4</td> +</tr> +<tr> +<td>-intstyle</td> +<td> </td> +<td>ise</td> +<td>None</td> +</tr> +<tr> +<td>-lc</td> +<td>LUT Combining</td> +<td>off</td> +<td>off</td> +</tr> +<tr> +<td>-o</td> +<td> </td> +<td>ALUSHOW_map.ncd</td> +<td>None</td> +</tr> +<tr> +<td>-w</td> +<td> </td> +<td>true</td> +<td>false</td> +</tr> +<tr> +<td>-pr</td> +<td>Pack I/O Registers/Latches into IOBs</td> +<td>off</td> +<td>off</td> +</tr> +<tr> +<td>-p</td> +<td> </td> +<td>xc6slx16-csg324-3</td> +<td>None</td> +</tr> +</TABLE> +<A NAME="Place and Route Property Settings"></A> + <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> +<TR ALIGN=CENTER BGCOLOR='#99CCFF'> +<TD ALIGN=CENTER COLSPAN='4'><B>Place and Route Property Settings </B></TD> +</tr> +<tr bgcolor='#ffff99'> +<td><b>Switch Name</b></td> +<td><b>Property Name</b></td> +<td><b>Value</b></td> +<td><b>Default Value</b></td> +</tr> +<tr> +<td>-intstyle</td> +<td> </td> +<td>ise</td> +<td> </td> +</tr> +<tr> +<td>-mt</td> +<td>Enable Multi-Threading</td> +<td>off</td> +<td>off</td> +</tr> +<tr> +<td>-ol</td> +<td>Place & Route Effort Level (Overall)</td> +<td>high</td> +<td>std</td> +</tr> +<tr> +<td>-w</td> +<td> </td> +<td>true</td> +<td>false</td> +</tr> +</TABLE> <A NAME="Operating System Information"></A> <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> @@ -366,30 +516,30 @@ <tr> <td>CPU Architecture/Speed</td> <td>Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz</td> +<td>Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz</td> +<td>Intel(R) Core(TM)2 Duo CPU E8200 @ 2.66GHz/2660 MHz</td> </tr> <tr> <td>Host</td> -<td>ECE-PHO115-09</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>ECE-PHO115-08</td> +<td>ECE-PHO115-08</td> +<td>ECE-PHO115-08</td> +<td>ECE-PHO115-08</td> </tr> <tr> <td>OS Name</td> <td>Microsoft Windows 7 , 64-bit</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>Microsoft Windows 7 , 64-bit</td> +<td>Microsoft Windows 7 , 64-bit</td> +<td>Microsoft Windows 7 , 64-bit</td> </tr> <tr> <td>OS Release</td> <td>Service Pack 1 (build 7601)</td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> -<td><font color=gray>< data not available ></font></td> +<td>Service Pack 1 (build 7601)</td> +<td>Service Pack 1 (build 7601)</td> +<td>Service Pack 1 (build 7601)</td> </tr> </TABLE> </BODY> </HTML>
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